Producing Scheduling that Causes Concurrent Programs to Fail

A noise maker is a tool that seeds a concurrent program with conditional synchronization primitives (such as yield()) for the purpose of increasing the likelihood that a bug manifest itself. This work explores the theory and practice of choosing where in the program to induce such thread switches at runtime. We introduce a novel fault model that classifies locations as .good., .neutral., or .bad,. based on the effect of a thread switch at the location. Using the model we explore the terms in which efficient search for real-life concurrent bugs can be carried out. We accordingly justify the use of probabilistic algorithms for this search and gain a deeper insight of the work done so far on noise-making. We validate our approach by experimenting with a set of programs taken from publicly available multi-threaded benchmark. Our empirical evidence demonstrates that real-life behavior is similar to what our model predicts

Field Programmable Reconfigurable Mesh (FPRM)

Many application areas demand increasing amounts of processing capabilities. FPGAs have been widely used for improving this performance. FPRM (Field Programmable Reconfigurable Mesh) is a technique we propose to improve FPGA performance. A Reconfigurable Mesh (RM) consists of a grid of Processing Elements that use dynamic reconfigurations to create varying bus segments between them. The RM can thus perform computations such as Sorting or Counting in a constant number of steps. It has long been speculated that the RM’s dynamic reconfigurations should replace the FPGA’s static reconfigurations. We show that the RM is capable of not only speeding up specific computations such as sorting or summing, but also of speeding up the evaluation of Boolean circuits (BCs), which is the main purpose of the FPGA. Our proposed RM algorithm can evaluate BCs without causing size blowup. Furthermore, tri-state switching elements can be used instead of PEs in a grid

DT: A Parallel programming language based on Two Dimensional transformations for Efficient Programming of Multi Processors Networks.

This work presents a novel paradigm for programming multi processors networks in both functional and algol like style. Let M be the union of all the processors memory, then a message passing can be veiwed as a transformation T : M ! M which transforms memory data from one processor to another. Using this veiw-point a new set of more gebneral transformations is derived, and is used for communication. Compare to massage passing based programs, 2DT enjoys the following advantages: It save the need to program communication protocols, by "forcing " the programmer to use built-in, high level and efficient communication transformations. The transformations (cite2dsimd) compresses many small messages into "big" packages, saving cpu-time needed for sending them one at a time. In particular, A 2DT expansion of FP ([3]) is devised. A simple semantic is used to show that the result of 2DT-FP is independent of the execution order. This should allows efficient implementations, and semantic simplicit..

The Cartesian Product Problem and Implementing Production Systems on Reconfigurable Meshes

Let A and B be two groups of up to n elements distributed on the first row of an n \Theta n reconfigurable mesh, and CA;B a subset of the cartesian product A \Theta B satisfying some unknown condition C. Only one broadcasting step is needed in order to compute CA;B 's elements. However, the problem of moving CA;B 's elements to the first row in optimal time (so that they can be further processed) is not trivial. The conditional cartesian product (CCP) problem is to move CA;B 's elements to the first row in O( jC A;B j n ) steps. This requires optimizing the cartesian product operation such that CA;B 's elements will be optimally scattered in the mesh, so that O(n) elements can be retrieved in a single step (as opposed to !( p jCA;B j) elements needed if the cartesian product is not optimized). We give a deterministic algorithm that for any A; B; C solves this problem in O(log log n \Delta jC A;B j n ) steps, and an "adaptive" randomized algorithm whose optimality is verified..

The IDOS system: An Approach for Distributed Internet Interactions

We propose a novel highly distributed setting called IDOS (Internet Distributed Objects System) for Buy/Sell interactions on the Internet. In IDOS there is no main or single site that handles the interactions of the users. Instead, each new user "joins" a dynamic graph of users that are currently interested in a specific type of Buy/Sell interactions. The objects for the Buy/Sell interactions are moved between the the nodes (users) of the dynamic graph. The Buy/Sell interactions are therefore realized by updating the objects whenever they pass through the current node. This replaces the communication bottleneck caused by the common use of sites for information retrieval and interactions on the Internet. We also believe that the design of Buy/Sell protocols is simplified due to the use of shared objects which usually represent the goods in the Buy/Sell protocol. Moreover, the objects are moved from one node to another using random walks, so that the topology of the dynamic graph can be ..

HPARC: A Mixed Shared Memory and Message Passing Programming Style for Heterogeneous Local Area Networks

We consider the problem of parallel programming in heterogeneous local area networks which connect segments of workstations and parallel machines (either message-passing or shared memory) using a variety of communication media. There are two possible ways to transform such a network into a single parallel machine. Implementing a global shared address space using DSM (distributed shared memory) techniques, or to use message passing environment. However, while efficient global DSM over a large size network is practically impossible, message-passing is too low level to handle the complexity of parallel programming in such heterogeneous networks. We choose a new outlook in which a mixed model of shared memory and message passing allows separate implementations of DSM on some of the network's segments. As a result, the network supports global message passing and separate small shared memory address spaces. The problem of how to write parallel programs that exploit such a mixed model is addr..